1. Field of the Invention
The present invention relates generally to analog-to-digital converters (ADCs), and more specifically, to a feed-forward ADC having a reduced number of amplifiers and feed-forward signal paths.
2. Background of the Invention
Delta-sigma modulators are in widespread use in ADCs and digital-to-analog converters DACs, in which they provide very linear behavior and simple implementation due to the reduced number of bits used in the analog signal comparison. Delta-sigma modulators can be implemented with a high level of control of the frequency distribution of “quantization noise”, which is the difference between the ideal output value of the modulator as determined by the input signal and the actual output of the modulator provided by a quantizer. The relative simplicity of the architecture and the ability to finely control the quantization noise makes delta-sigma converter implementations very desirable.
The delta-sigma modulator based ADC includes a loop filter that receives an input signal and a quantizer that converts the output of the loop filter to a digital representation. Feedback from the quantizer output is applied to each integrator in the loop filter for feedback modulator topologies or only to the input of the loop filter for feed-forward modulator topologies. The feedback provided from the quantizer is typically generated by a coarse feedback DAC that receives the digital output of the quantizer and generates an analog value that is provided to the loop filter. The feedback provides a closed-loop that causes the time-average value of the output of the quantizer to accurately represent the value of the modulator input signal. The loop filter provides shaping of the quantization noise at the output of the quantizer in response to the feedback signal applied from the quantizer to the loop filter.
The loop filter in the feed-forward topology described above typically requires a summer that combines signals from each of a plurality of analog integrator states that are connected in cascade. The input of the cascade receives the input signal to be converted and the output of the summer provides the input to a the quantizer that digitizes the input signal. Each of the integrator stages requires an amplifier. The summer that sums the integrator output signals to generate the quantizer input must handle a combination of the maximum deviation of each of the outputs integrator stages. All of the components listed above contribute to increased power consumption and die area usage. Therefore, it would be desirable to provide an ADC using a delta-sigma modulator having a reduced number of amplifiers. It would further be desirable to provide a feed-forward delta-sigma modulator-based ADC having a reduced dynamic range requirement and power consumption at the summer.